FIG. 1 illustrates a cross-sectional view of a conventional extended drain n-type metal oxide semiconductor (ED-NMOS) transistor.
The MOS transistor has three modes of operation depending upon the terminal voltages. For example, a MOS transistor has terminal voltages Vg (gate terminal voltage), Vs (source terminal voltage), and Vd (drain terminal voltage). The NMOS operates in a cutoff mode when a bias voltage Vgs between the gate and the source is less than the threshold voltage Vth of the MOS transistor. Essentially, in the cutoff mode, no channel develops and the current Ids in the channel region is zero.
The NMOS operates in a linear mode when the bias voltage Vgs exceeds the threshold voltage Vth as long as a channel voltage Vds does not exceed a saturation voltage Vds,sat. Typically, the saturation voltage is defined as the bias voltage Vgs less the threshold voltage Vth. The current Ids increases with the channel voltage Vds when the NMOS is in the linear mode. Finally, the channel pinches off and the current saturates when the channel voltage Vds exceeds the saturation voltage Vds,sat. Ids is substantially independent of Vds when the NMOS transistor is in this saturation mode.
An extended drain metal oxide semiconductor (ED-MOS) transistor is characterized by a relative high specific on resistance (RON) especially in comparison to a laterally diffused metal oxide semiconductor (LD-MOS) transistor. However, the ED-MOS is characterized as having a reduced number of mask layers over the LD-MOS. Conventionally, the breakdown voltage of the ED-MOS and LD-MOS have been increased by reducing the concentration of dopant in the drift region or increasing the length of the drift region. This results in an increase in the RON.
Thus, without intending to be limiting, conventionally the current of MOS transistors may depend upon the type of dopant and the extent of doping in any of the regions of the semiconductor, the dielectric thickness and the dielectric material, and the gate material. Moreover, as disclosed herein, conventional changes in the design of the MOS transistor that increase the breakdown voltage also increase the RON.
There remains a need in the art for a MOS design that increases the breakdown voltage but without substantially affecting the RON of the MOS transistor. Conversely, there remains a need in the art to reduce the RON without substantially changing a desired breakdown voltage of the MOS transistor.
Furthermore, a long-felt need in the art has been to reduce the size of power semiconductor devices still having increased breakdown voltages yet without substantially compromising the RON.